FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

Device Tree generation


hello! I try to make all the chain starting from Quartus GHRD design until obtain SD card running Linux on Terasic DeoNanosoc (Cyclone 5)


Well, after many attempts due to general confusion and many links wrong and many errors found on Rocketboard procedures, I obtained a card booting linux Angstrom 2018.06 succesfully on Deo Nano Soc


then, I passed to make the process on my self developed Cyclone5 card.


I found serious problem when Generate device tree: the XMLs board infos file generated form Quartus are not good for Sopc2dts java script (scructure and definitions are different from original xml terasic)


I'm reading manual for device tree generation: but correct XML must be written manually????? There isn't a script or method to obtain them from Quartus?


Thanks for any help!


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The latest //github.com/altera-opensource/linux-socfpga doesn’t use sopc2dts tool.

Some dts files are located in arch/arm/boot/dts including socfpga_cyclone5_de0_nano_soc.dts.

Can you use that file instead of sopc2dts?

You can build dtb to type ‘make socfpga_cyclone5_de0_nano_soc.dtb’ in linux-socfpga folder.