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Hello all,
All my apologies in advance for my newbie question! In the near future I will be developing part of a FPGA code, which will contain proprietary information. This code/module will be provided to an external party for integration in the overall FPGA architecture. As such I would like to provide this module as a black box but still allows my counterpart to be able to optimise the overall FPGA. What would be the best way to proceed?
Thanks!
Franck
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Hi Franck,
Here is a similar previous case. Probably can help you out.
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Hiding-VHDL-code-Black-Box/m-p/24796
Best regards,
Sheng
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Hi Franck,
Here is a similar previous case. Probably can help you out.
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Hiding-VHDL-code-Black-Box/m-p/24796
Best regards,
Sheng
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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Many thanks Sheng for your support! It indeed fully answers to my question!
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Hi Franck,
I’m glad that you find the solution provided helpful.
I'll now transition this thread to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.
Thank you.
Best regards,
Sheng
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.
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