FPGA, SoC, And CPLD Boards And Kits
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Hello TEAM, Could you please confirm what is the coplanarity specification for PN 5SGXEA7N2F40I2LN, thanks.

JRodr54
Beginner
‎01-24-2019 05:53 PM
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ChiaLing_T_Intel
Employee
‎01-29-2019 03:29 AM
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Hi, You can refer to the packaging datasheet for the information. Package information includes the ordering code reference, package acronym, leadframe material, lead finish (plating), JEDEC® outline reference, lead coplanarity, weight, moisture sensitivity level, and other special information. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/packaging/04r00312-03.pdf Thank you Regards, Chia Ling
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