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5234 Discussions

Highspeed LVDS ADC interface to arria 10 fpga

Rk_Athram
New Contributor I
569 Views

Hi,

I am using  high speed ADC (ADS62P25IRGCT) with arria10,

Output of ADC is LVDS, i want single ended input in FPGA,

GPIO ip: is Not suitable as specified in datasheet.

GPIO Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices

Rk_Athram_0-1630316500533.png

 

2)LVDS serdes IP:

LVDS SERDES Intel FPGA IP User Guide: Intel Arria 10 and Intel Cyclone 10 GX Devices

The output is parallel and width is multiple of SERDES Factor. 

Rk_Athram_1-1630316609864.png

 

 

These two may nit suitable for my requirement,

please suggest IP  for LVDS to  single ended input in FPGA.

 

 

 

Regards,

Rajesh

 

0 Kudos
1 Solution
Ash_R_Intel
Employee
508 Views

Yes, you can use it to convert the differential signal to single ended and implement the DDR data capture logic to it. The IP basically configures the IOE element of the device.

Regards


View solution in original post

5 Replies
Rk_Athram
New Contributor I
538 Views

ADC is DDR LVDS output,  

Rk_Athram_0-1630418105206.pngRk_Athram_1-1630418147167.png

 

Please suggest IP which features LVDS and DDR.

 

 

Ash_R_Intel
Employee
527 Views

The GPIO Intel FPGA IP can be configured to be used with a differential buffer and DDIO as Register mode. You can assign LVDS IO standard to the input pin.


Regards


Rk_Athram
New Contributor I
518 Views

Hi @Ash_R_Intel ,

 

Thank you for response.

 

from the GPIO IP Datasheet  : "You can use GPIOs in general applications that are not specific to
transceivers, memory interfaces, or LVDS."

 

Rk_Athram_0-1630476347084.png

 

by the statement given in datasheet,

can we still use GPIO IP for LVDS pins ?

 

 

Regards,

Rajesh

Ash_R_Intel
Employee
509 Views

Yes, you can use it to convert the differential signal to single ended and implement the DDR data capture logic to it. The IP basically configures the IOE element of the device.

Regards


Rk_Athram
New Contributor I
506 Views

Hi @Ash_R_Intel ,

 

Thank you for clarification/support.

 

 

 

Regards,

Rajesh 

 

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