FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

Host Pipes OpenCL

MDavi14
Beginner
2,500 Views

Hi,

I am working with an Stratix 10 GX development kit, and I have a problem with the example design loopback_Host Pipe. When the host communicate with the OpenCL command clSetKernelArg(kernel, 0, sizeof(cl_mem), (void *)&write_pipe), the following assert is shown:

 

host: acl_hal_mmd.c:2486: acl_hal_mmd_hostchannel_create: Assertion `device_info[physical_device_id].mmd_dispatch->aocl_mmd_hostchannel_create' failed.

 

This problem just happens with host pipes.

 

How can I solve this?

Thanks in advance.

0 Kudos
4 Replies
Kenny_Tan
Moderator
1,977 Views
Did you get the example in https://www.altera.com/support/support-resources/design-examples/design-software/opencl/gzip-compression.html https://www.altera.com/support/support-resources/design-examples/design-software/opencl/host-pipe.html May I know which version of compiler that you were using? Host channel is not supported on the later versions of the compiler, but it is available on 17.0 and 17.1.
0 Kudos
MDavi14
Beginner
1,977 Views

The source code that I used is the example in:

https://www.altera.com/support/support-resources/design-examples/design-software/opencl/host-pipe.html,

The aocl version is:

aocl 18.1.0.222 (Intel(R) FPGA SDK for OpenCL(TM), Version 18.1.0 Build 222 Pro Edition

That means, the 18.1 do not have support for the host-pipe example such as the software and hardware requirements suggest?.

 

 

 

 

0 Kudos
Kenny_Tan
Moderator
1,977 Views

Yes, I would suggest you use the example design base on the software requirement.

0 Kudos
Kenny_Tan
Moderator
1,977 Views
Is there any update?
0 Kudos
Reply