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5157 Discussions

How to instaniate a SFL ip core in the design

WKUAN
Novice
342 Views

Hello, 

I am using ARRIA10 with EPCQL1024, now the ARRIA10 is ok, the SOF can be configured into the FPGA, but when I configure the EPCQ1024 with JIC file, the configuration failed.

After read an370, I find the chip ARRIA10 should use SFL ip core to configure the JIC,  but I don't know how to instaniate the ip core in my design, such as the port connection. especially the port asmi_access_granted and asmi_access_request; should I assign all the port to the PIN of ARRIA10 CHIP?

sfl (
input wire asmi_access_granted, // asmi_access_granted.asmi_access_granted
output wire asmi_access_request, // asmi_access_request.asmi_access_request
input wire [3:0] data_in, // data_in.data_in
input wire [3:0] data_oe, // data_oe.data_oe
output wire [3:0] data_out, // data_out.data_out
input wire dclk_in, // dclk_in.dclkin
input wire [2:0] ncso_in, // ncso_in.scein
input wire noe_in // noe_in.noe
);

 

Is there anyone share the code how to instaniate? 

Thanks

KUANG Wu

0 Kudos
8 Replies
YuanLi_S_Intel
Employee
328 Views

Hi,


You dont need to instantiate SFL IP when you are programming JIC into FLASH using Quartus Programmer.


May i know what error you got during programming?


Regards,

Bruce


WKUAN
Novice
319 Views

Hi Bruce,

Thank you.

I am afraid the EPCQL1024 chip is damaged, because i can not configure the chip.

Now I have a new problem, the FPGA on my board is 10AX115N3F45E2, but when I scan chain in signaltap, the chip is 10AT115S1, so i can not debug the chip with signaltap. when i use programmer with the .sof file, it is ok to configure the chip 10AX115N3F45E2, and the code works, it is very confusing!

KUANG Wu

 

YuanLi_S_Intel
Employee
312 Views

Hi Kuang Wu,


This is confusing. But by right you will be able to select the appropriate device ordering number in signal tab after the JTAG is ready.


Thank You


WKUAN
Novice
303 Views

Hi Bruce, it is great to hear that the device can be selected in signaltap,  but i can not find the signal tab, I use Quartus prime version16.1.0, is the version ok?  could you please share a picture with me, thank you. 

WKUAN
Novice
290 Views

Hi Bruce,

Error (12852): Data integrity error is detected during JTAG communication. The SignalTap result is not trustworthy. Please check the JTAG chain.

this is the echo of quartus.

Thank you

YuanLi_S_Intel
Employee
277 Views

Hi,


In signal tab tools, at JTAG Chain Configuration tab there, you may click the "device" to select the device available in the JTAG chain.


Meanwhile, for the error (12852), it seems like the USB Blaster that you are using is having issue. Can you try with another USB Blaster?


Regards,

Bruce


WKUAN
Novice
272 Views
Thanks Bruce,
The problem has been solved by replacing the USB Blaster with USB Blaster II cable.
KUANG Wu
YuanLi_S_Intel
Employee
259 Views

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


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