I can successfully run the design example from PCIe IP guide for A10 devkit, however when I exchang the onchip_memory2_0 component with my own it hangs the PCIe bus.
With the MEM component connected can I see the chipselect being asserted from Signaltap. However with my own component it is not asserted.
Somethingg I did notice, which I find is strange, is when connecting the MEM (example) component, the platform generator also instantiates the altera_reset_controller. When connecting my own component, it does not instantiate this altera_reset_controller.
What am I missing? Why is there no chip-select active when connecting my own component?
An update: if I leave in the MEM component, add my own component, and connect it to the same master and make sure their address spaces do not overlap and fall within the address range of the master (0xffff) then I am able to access my own component. Why is that?
If this is the case, I would suggest capturing the signal tap at the interface of your custom component with and without appearing of On-chip memory. So that we can compare the difference. Probably something minor that not compliant with AVMM spec.