I am currently working with the Agilex™ 5 FPGA E-Series 065B Modular Development Kit and looking for an example GTS HDMI IP block design. However, I could not find the block diagram of the example design in the available documentation.
Could you please provide additional documentation or resources related to the example design? Any guidance on where I can locate the relevant materials would be greatly appreciated.
Additionally, Is the GTS HDMI IP example provided only in Verilog? Can I create an example in VHDL?
Thank you for your time and support. I look forward to your response.
Best regards,
Murat ALKAN
Digital Design Engineer – AnadoLogic
連結已複製
Hi Muratalkan,
I not sure is there any specific block diagram that you try to look at ?
For the overall IP block diagram you may refer to our latest version of user guide : 2. HDMI Overview
Any additional guide if you need to refer you may go to our fpga documentation index
Let me know if there is anything else I could better clarified.
Regards,
Wincent
Hi,
I wish to follow up with you about this case.
Do you have any further questions on this matter ?
Else I would like to have your permission to close this forum ticket. Nevertheless, you can still response to the forum and I will be available to assist you.
Regards,
Wincent_Altera
Hi,
As we do not receive any response from you on previous question/reply/answer that we provided. Please login to “https://supporttickets.intel.com/s/?language=en_US’, view details of desire request, and post a feed/response within net 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on follow-up questions.
Regards,
Wincent_Altera
