FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
6159 Discussions

Internal ESD protection of Arria V.

SUrba3
Beginner
1,134 Views

Hi,

we would like to know if there is any ESD protection (diode, resistors...) Arria V 5AGXMB7G4F35C5N at every IO pin including RX/TX and VCC inputs.

 

Where can I find the needed information? Especially the max. surge levels of voltage and current.

 

Many thanks!

 

Kind regards,

Sven

0 Kudos
5 Replies
YuanLi_S_Intel
Employee
1,000 Views

Hi Sven,

 

You may refer to our Arria V datasheet for the absolute maximum rating for the I/O:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_51002.pdf (Page 6)

 

Thank You.

0 Kudos
SUrba3
Beginner
1,000 Views

Hi Bruce,

 

please refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_5v2.pdf page 155. There is a optional clampind diode shown. This diode is recommend for

 

"If the input signal is 3.0 V or 3.3 V, Altera recommends that you use a clamping diode on the I/O pins. Use the on-chip clamping diode for the Arria V GX, GT, SX, and ST devices, and an external clamping diode for the Arria V GZ devices."

 

Where to find the clamping voltage of this diode? Where to find max. voltage and current for clamping event of this diode? Are the values mentioned by you the max. ratings for clamping event?

Its very import for us to find out because of Maximum Allowed Overshoot During Transitions for Arria V Devices in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-v/av_51002.pdf page 6.

Depending of AC input voltage the Overshoot event could be taken in account with the optional clamping diode mentioned above.

 

Many thanks in advance.

 

Kind regards,

Sven

0 Kudos
YuanLi_S_Intel
Employee
1,000 Views

Hi Sven,

 

Yes, the value will not exceeding VOL and VOH when it is clamped with clamping diode. To enable this, you will need to enable in pin assignment in Quartus software.

 

Thank You.

0 Kudos
SUrba3
Beginner
1,000 Views

Hi Sooy,

 

how about an unconfigured/factory programmed FPGA? Are the diodes on or off without a first initial debug?

 

Regards

Sven

0 Kudos
YuanLi_S_Intel
Employee
1,000 Views

Hi Sven,

 

During configuration mode, all the I/O pin will be tri-stated with weak pull up. After that, the diodes will turn back based on your setting.

 

Thank You.

0 Kudos
Reply