Is there a minimal working example written in either vhdl or verilog for using the ethernet connection on the cyclone 10 lp development kit?

[JHonk]

I am looking for a minimal working example with which I could send some test data through the on board ethernet of the cyclone 10 lp development kit. I have a signal generation module written in vhdl, which generates 16 bit sine that I want to sent through the ethernet to PC. At the moment I have an UART for communication between PC and fpga.

I am learning how to use ethernet, therefore the simplest possible protocol and ip configuration would be very useful right now.

[Abe]

There's no design example or reference design for Cyclone 10LP devices, but you can try with the following Triple speed Ethernet example for Cyclone III. You may have to modify the design a bit, ie, regenerate the corresponding IP for Cyclone10 LP device, build the HW and SW and test it out. Pay attention to re-targeting the device and the pin outs.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-tse-sgdma.html