Lightweight HPS-to-FPGA bridges setup

[AVoye]

Hello, 

I would like to send a 4 bit-word to FPGA from HPS with the lightweight bridges with DE0-nano-SoC. 

I used GHRD 2018.05 and I wrote a C code. 

The C code compile and run in the HPS. But when I configure the FPGA with Quartus, HPS shut down so it's impossible to run the C code in the HPS.

Do you have a solution ? or example for me ?

Thank you in advance !

Arnaud

[MuhammadAr_U_Intel]

Hi @AVoye​ 

Have you been able to successfully run a simple hello world example ?

You can refer to youtube video on writing a Bare-metal application.

https://www.youtube.com/watch?v=GHuM2mBlLxc&t=

also detailed documentation for SOC EDS User Guide.

https://www.intel.com/content/altera-www/global/en_us/index/documentation/lro1402536290550.html

As for the Programming FPGA, refer to different programming option explained on web tutorials.

https://rocketboards.org/foswiki/Documentation/GSRD131ProgrammingFPGA

"For the GSRD the selected method of programming the FPGA is from U-boot, with the image stored on the SD card.

This page uses the Cyclone V GHRD (Golden Hardware Reference Design) as an example, but similar instructions can be used for the Arria V GHRD.

Note: Before re-programming the FPGA fabric, make sure that the FPGA2HPS bridges (f2sdram, axi) are disabled, and that there is no software on HPS that may access the FPGA. This includes shutting down applications that access soft IP and also unloading any soft IP Linux kernel modules. Failure to do so will cause the system to behave in a non-deterministic way and most likely it will crash."

I Hope this information is helpful for you to proceed.

Thanks,

Arslan