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Hello,
As a beginner in FPGA technology, I am currently participating in a project that involves transitioning from a Stratix device to the new MAX 10 series FPGA. Specifically, we are using the 10M25DCF484 dual supply FPGA, which operates using both 2.5V and 1.2V. While we are not utilizing the ADC option, we are using PLL's to generate four identical clocks. My understanding is that the PLL's are supplied through the VCCD_PLL pins(1.2V). However, the datasheet indicates that the VCCA pins must be connected to 2.5V, even though we are not using ADC or analog PLL's. Can you confirm if my understanding is correct? Also, if 2.5V is indeed required, could you explain its significance?
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datasheet clearly specifies that 1.2V and 2.5V must be provided for dual-supply MAX10 types, even if the ADC and PLL are unused. I presume 2.5V is monitored in POR detector. MAX10 PLL is comprised of an analog (VCO) and digital part, analog runs from 2.5V through internal regulator.
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As we do not receive any response from you on the previous question/reply/answer that we have provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

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