Hello,
As a beginner in FPGA technology, I am currently participating in a project that involves transitioning from a Stratix device to the new MAX 10 series FPGA. Specifically, we are using the 10M25DCF484 dual supply FPGA, which operates using both 2.5V and 1.2V. While we are not utilizing the ADC option, we are using PLL's to generate four identical clocks. My understanding is that the PLL's are supplied through the VCCD_PLL pins(1.2V). However, the datasheet indicates that the VCCA pins must be connected to 2.5V, even though we are not using ADC or analog PLL's. Can you confirm if my understanding is correct? Also, if 2.5V is indeed required, could you explain its significance?
