- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I am working to use the MAX10 kit (Mrf No. DK-DEV-10M50-A) write and read data into/from the DDR3 SDRAM.
I have no experience in operating the DDR3 using the Uni-PHY. Therefore, I follow the tranning course as the following. This is a quite helpful tutorail.
http://www.altera.com/customertraining/webex/MemInt/player.html
As the tutorial is recorded in 2013. After following the tutorial, still struggling with the implementation of DDR3 into the MAX10 FPGA develop kit such as simulation, timming analysis and implementations.
I am wondering whether there is any other tutorials regarding MAX10 DDR3 available online for me to follow up?
Thanks ahead for your help.
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi
I found the reference design in the Intel IP store web. Does this design help you ?
https://fpgacloud.intel.com/devstore/platform/16.0.0/Standard/ddr3-with-board-test-system-console/
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
Thanks for the reply. Has tried out the link before. Will keep on learning the EMIF datasheet. Hope to have some specific example tutorial can follow. Thanks again for the information.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page