FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

MAX10 VREF minimum value

Vocabularix
Novice
1,004 Views

Hello,

 

While checking our board design, I noticed that the chosen reference voltage for our 10M04SAU169 board is +2,5VDC, with VCCA +3,3VDC and VCCONE +3,3VDC.

This is not correct according to M10-DATASHEET page 31, which specifies VREF be between VCCONE-0,5V and VCCONE, so in our design VREF has to be between 2,8V and 3,3V.

However, in the 10M08 EVAL BOARD, the external reference is +2,5VDC and, same as our design, VCCA = VCCONE = +3,3VDC.

What part of the ADC specs is no longer guaranteed if VREF is below VCCONE-0,5V ? How could an eval board not follow the datasheet ? The eval design is from 2014 but I didn't see any change to VREF in the Document Revision History of the MAX10 datasheet.

0 Kudos
2 Replies
Ash_R_Intel
Employee
846 Views

Hi,

Please follow the specification stated in our datasheet. The MAX 10 evaluation kit was designed in year 2014, no restriction on the VREF characterized that time. Our design team has verified the specification of VREF in datasheet to endure the ADC performance. VREF lower than the specification is not guaranteed.


Regards


0 Kudos
Ash_R_Intel
Employee
708 Views

We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


0 Kudos
Reply