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soc_qsys
I am trying to read and write to DDR3 in DE10 nano with multiple Avalon MM interface . While using single Avalon MM interface ,it will work. But using two MM interface one port waitrequest is always high.
Regards,
Nithin
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Hi NKRIS7,
I remember you open one thread which is --> https://forums.intel.com/s/question/0D50P00004OyVC3/hi-i-am-working-with-de10nano-board-to-access-external-ddr3-fpgatohps-sdram-interface-axi3-is-not-working-properlyaxiawready-is-always-low . It seems to be similar issue where you are facing problem on the waitrequest signal.
May i have your confirmation whether this is the similar issue? If yes, then may I suggest to continue the conversation in previous thread ?
Thank you for your kind understanding. 😊
Regards,
NAli1
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Hi NAli1,
Yes , Avalon MM and AXI interface have problem in wait-request signal for port 1. We can continue the conversation in previous thread
Regards,
NKRIS7
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Hi NKRIS7,
I believed the issue is now solved based on your confirmation in previous thread 😊
Regards,
NAli1

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