FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
All support for Intel NUC 7 - 13 systems has transitioned to ASUS. Read latest update.
5844 Discussions

NIOS II boot loader for EPCS




I have a cyclone V FPGA development board 5CEBA4F23C7N with an EPCS64 attached to it for non volatile memory purpose.


I created a NIOS II application for it that could be boot loaded to the SDRAM using boot copier.

I Placed an Legacy EPCS/EPCQx1 Flash Controller in the platform designer and set the reset vector to the base address of the EPCS Controller and the exception vector to the on chip memory.

In the software side I edit the BSP settings to to disable all the options as the documents says(Image attached). and changed the region in the linker to ON chip memory.


But then when I launch the flash programmer it does nothing. I selected the .sof and the elf file for that project. only thing that appear in the programmer is the generating scripts no problems are shown either.(Image attached)

I even tried to reinstall the whole Quartus software along with the WSL ubuntu18LTS, still the flash programmer does not work.


I even tried to generate using mem_init_generate to generate the HEX file  and using the convert in Quartus prime tried to generate the .jif file, but only the hardware side works, the softcore does not get loaded.

Useing Quartus Prime Lite 20.1.1. 


Can someone please help me out here..


0 Kudos
1 Reply

Can you replace with Intel GSFI IP for the flash interface in your Platform Designer.


0 Kudos