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Hi,
I am using Cyclone V GT device which has 113k ALMs, 430 k registers and 301 kLEs. When I synthesise the cod, the resource utilization in shown in terms of ALms.
Suppose if i want to port it to other device family / package, I want to know the relation between ALM ,LE and LUT so that i can check if my design fits in a device whose resources are given in just the LEs or LUTs.
Please tell me the relation between LE, LUT, register and ALM.
Thanks in advance.
Regards
Ssrb
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Hi Ssrb,
Cyclone V devices use a 28 nm ALM as the basic building block of the logic fabric. The ALM has an 8-input fracturable look-up table (LUT) with four dedicated registers.
(Source: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_51001.pdf)
Thanks.
Best regards,
KhaiY
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Hi,
This link details how to interpret the Fitter Resource Usage Summary Report
https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/mapIdTopics/mwh1465496451103.htm
Thanks.
Best regards,
KhaiY
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Hi,
Do you have any updates?
Thanks.
Best regards,
KhaiY
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Hi,
We do not receive any response from you to the previous question/reply/answer that I have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.
Thanks.
Best regards,
KhaiY
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