SRAM Corruption is MAX V CPLD

[MHamz1]

Hi,

I am facing an issue in MAX V CPLD, when the voltage rail is increased slowly from 0 to 1.8 V with minor fluctuations, the CPLD logic behaves abnormally, like some part works and some part does not.

Majorly according to my observation the Variable used for creating state machines are getting corrupted.

Kindly suggest a suitable fix or workaround for this issue, can the SRAM be loaded again? or how can it be handles in HDL efficiently

[ShafiqY_Intel]

Hi MHamz1,

When you configure MAX V CPLD, can you try to check on Configuration Pins (nConfig, nStatus, Conf_done and Init_done) ?

Thanks.