Simulating the behavior of external memory

[Mahdi]

Hi,

I am wondering if there are any ways to simulate the behavior of external memory (DRAM with DDR4 protocol) on Intel Stratix 10 FPGA. I know that I can simulate the EMIF itself, and I have already connected the EMIF to my design. But I do not know how to simulate the DRAM as well without connecting the design to the actual FPGA board. 

Thanks, 

- Mahdi 

[sstrell · Accepted solution]

Everything you need is here, even a dedicated section on simulation: https://www.intel.com/content/www/us/en/support/programmable/support-resources/support-centers/emif-support.html

[AdzimZM_Intel]

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