FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits

Terasic DE3 JTAG

Altera_Forum
Honored Contributor II
912 Views

Hi, 

 

we developed a daughter board for the DE3 board's top connector and forgot to shorten TDI and TDO together. The daughter board itself does not use JTAG. 

As a result the FPGA cannot be programmed while the daughter board is plugged in. 

My question is how the DE3 decides if a daughter board is plugged in and when to bypass the connector? 

Is there a solution without unplugging the daughter board? 

 

Jan
0 Kudos
6 Replies
Altera_Forum
Honored Contributor II
192 Views

Read the DE 3 User manual about DIP switches that configure the JTAG chain. There's a bypass switch for each HSTC connector.

Altera_Forum
Honored Contributor II
192 Views

That's only for the bottom connectors. We need a top connector. I think the only solution is to connect the pins with a wire.

Altera_Forum
Honored Contributor II
192 Views

Yes, I didn't notice, that the bypass switch is valid for the bottom connector only.

Altera_Forum
Honored Contributor II
192 Views

Anyone got a solution for this? I have the same issue right now.

Altera_Forum
Honored Contributor II
192 Views

short answer: unplug the daughter board when you want to use JTAG. otherwise TDI and TDO _must_ be connected on the daughter board.

Altera_Forum
Honored Contributor II
192 Views

I can't really unplug, since i need to use signaltap with the daughterboard in use. I used to do that but its simply not an option any longer. 

 

Wierd thing is that im using alteras own daughterboard "Dual Highspeed AD DA" board, and I simply can't find any way to connect it! The only option i've found so far is getting hold of the SFF connector to disable JTAG (see attatched pic).
Reply