FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5972 Discussions

Unable to generate a loadable .sof for Stratix 10 Development Board

NLewi3
Beginner
633 Views

I am able to successfully load the Intel provided ‘btsd_config.sof’ for the Stratix 10 Development Board using the Quartus Prime Programmer.

 

However,  I am unable to generate a .sof file that I can load into the Stratix 10 Development Board. I have a very simple design, an input clock driving a counter which is attached to some output LEDs. The .sof that is generated stops loading at 13% and the error “Device has stopped receiving configuration data. Error message received from device: Device is in configuration state. Operation failed”.

 

I am using Quartus Prime 19.1.0 with patch 0.03

 

I am at a loss as to what the problem could be???

 

0 Kudos
1 Reply
JohnT_Intel
Employee
232 Views

Hi,

 

May I know what is the configuration setting are using on your Quartus project? May I know what is the blaster you are using? If you are using blaster II then could you try to reduce TCK clock frequency?

0 Kudos
Reply