FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
6469 ディスカッション

We are conducting the Failure in Time analysis for the Intel Altera CPLD . We require some inputs, for this. Can someone from the Intel Altera support team assist us regarding this

AKuma121
ビギナー
1,342件の閲覧回数
 
0 件の賞賛
1 返信
ChiaLing_T_Intel
従業員
604件の閲覧回数
Hi Ashutosh Kumar, For your information, you can find the FIT rate for Intel FPGA from the Reliability Report. Kindly be noted that the FIT rate for devices within the same family with the same process technology will be very similar and can be used for devices not explicitly listed in the Reliability Report. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/rr/rr.pdf Thank you Regards, Chia Ling
返信