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Hi,
I'm using EMIF IP Core in my Arria10 SoC, there's an auto-generated Avalon-MM interface to communicate with user logic, but I haven't found the timing diagram of Avalon-MM in the EMIF user guide so far, where can I find the the correct timing diagram?
Besides, how can I confirm the relationship between the Avalon-MM's address and external-memory's address?
Thanks, regards.
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Hi,
Here is the Avalon MM Interface Specifications:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf#page=12
Example design to help you:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20118.pdf
Regards.
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