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I have a Cyclone V design using FPGA and HPS resources. I want the FPGA to have access to the SDRAM on the HPS. So I'm using
alt_bridge_init(ALT_BRIDGE_F2S, NULL, NULL);
to initialize this as I understand I need to. (I'm doing bare metal, not Linux on the HPS). Occasionally, this works, but more often it hangs the CPU when I run this. It looks like this function is supplied by Intel and does all of the things the documentation says need to be done before enabling the SDRAM interface from the FPGA. Before I run this, I do see that the register ALT_SDR_CTL_FPGAPORTRST_ADDR has all zeros in it (meaning the interface is all reset). After a successful enabling of this, it's 0x3ff as expected. But most often, my processor hangs when executing this function.
What is 100% reliable, so far, is setting a breakpoint at the top of this function and stepping, line by line, through it. That's never failed work. But if I run it straight from my QSPI or even the debugger without the breakpoint, it most often hangs.
Thoughts?
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It seems that using the supplied boot loader (uboot-based SPL) it will initialize this interface for us. That's not clear in anything I read/saw, but seems to be the case so I have removed the initialization from my code and it seems to be working, now.
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It seems that using the supplied boot loader (uboot-based SPL) it will initialize this interface for us. That's not clear in anything I read/saw, but seems to be the case so I have removed the initialization from my code and it seems to be working, now.

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