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Hello,
Issue: I want to design a fairly complex FPGA device using mostly .bdf schematics. Each schematic will be essentially a page in the overall multi-page system design and its documentation. For example, a page might be a 32 bit register with lots of gated inputs and outputs implemented in bdf.
Question: How do I connect the schematics/pages? How do I label page I/O so it can be connected at the system level and makes sense in the documentation? It would seem this is where Platform Designer comes in, but I’ve been unable to find info about it or otherwise that even gets me started.
Any tips greatly appreciated. Courses, videos, documents, etc. greatly appreciated. This seems about the most obvious of issues; surely there’s a step-by-step out there.
Many thanks,
Bill McDonald
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No, PD is a system design tool, where you add components (off-the-shelf IP or your own custom IP) and connect their interfaces together.
A PD system can be the top-level in a Quartus project or it can be instantiated lower down in the project hierarchy.
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For connecting schematics, simply name the I/O pins the same between the different .bdf files in the same project. An easier thing to do, however, is to have a top-level schematic where you add the other schematics as blocks in the top-level schematic.
To learn about Platform Designer, start here:
https://www.intel.com/content/www/us/en/programmable/support/training/course/oqsyscreate.html
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Hi sstrell,
This is the second time you’ve gotten me unstuck, and I very much appreciate your help.
One question about your reply: You refer to a “top-level schematic”. Is this done with Platform Designer, or is there another method?
Again, many thanks!
My best,
Bill
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No, PD is a system design tool, where you add components (off-the-shelf IP or your own custom IP) and connect their interfaces together.
A PD system can be the top-level in a Quartus project or it can be instantiated lower down in the project hierarchy.
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Ok, I think I understand. I can use the Block/Schematic Editor to design a higher-level schematic that ties my desgin elements e.g., registers, together the way I used it at the low-level to combine primitives to create the registers. Right?
Many thanks,
Bill
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Hello again,
I've been playing w/Schematic/Block editor and am beginning to understand the relationship between .bdfs and .bsfs. I belive I'm back on track and will mark this as complete thanks to your help.
Best regards,
Bill
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Hi William.
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
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