I am running a simulation of an Arria 10 native transceiver IP + reset controller IP + Atx_pll
Under the 10GBase Protocol so I can transmit 64 bits of data.
The ref clock is 322.265625 Mhz, sys_clock 100 Mhz
At the moment I am just trying to pass a simple constant value of tx_parallel_data but the rx_parallel_data shows an error.
I am not sure what I am doing wrong.
As I understand it, you are observe incorrect RX parallel data with A10 Native PHY in Modelsim simulation. If I understand it correctly, you are using the Native PHY under 10GBase-R mode. Just would like check with you if you have had a chance to try sending constant sync pattern for 10GBase-R to see if it helps.
Thanks for quickly replying. I am quite new to transcievers.
I've previosly succesfully simulated 1 Channel rx/tx to send 8 bits, by configuration the native with a standard PCS. And setting the Rx word Aligner pattern (hx) to: 17C, with RX word aligner mode to sync_sm. Since I used the 8/10 enconder/ decoder too.
But where could I set up a sync pattern for 10GBase-R in the native PHY IP?
For your information, I am not really familiar with the 10GBaseR protocol requirement. However, can you try with the idle pattern of 64'h0707_0707_0707_0707 to see if it helps.