Booting NIOS II from Altera Serial Flash Controller (EPCQ) with blinking LEDs

cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Search instead for 
Did you mean: 
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
340 Discussions

Booting NIOS II from Altera Serial Flash Controller (EPCQ) with blinking LEDs

Intel FPGA Wiki:Booting NIOS II from Altera Serial Flash Controller (EPCQ) with blinking LEDs

(Redirected from Booting NIOS II from Altera Serial Flash Controller (EPCQ) with blinking LEDs)




  • Booting NIOS II from Altera Serial Flash Controller (EPCQ) with blinking LEDs design example

Overview

A design of booting NIOS II processor from EPCQ flash with blinking LEDs is presented here. This design was created following the AN-736 Nios II Processor Booting From Altera Serial Flash (EPCQ), utilizing Cyclone V SOC development board. If another device would be targeted for this project, the user can change the targeted device in this example to any required device, with the following steps:

  • Change the device family from Assignment tab > Device > Device family.
  • Change the pin assignments for the reset signal (Push button) and the clock source, from Assignments tab > pin planner.
  • Change the EPCQ/S model in EPCQ_CONTROLLER IP according to the user board specifications.

The Design file can be downloaded from here File:NIOS DEBUG.zip.

Hardware considerations

The snapshot below elaborates the basic Qsys system required for booting NIOS II from EPCQ flash.

b/b8/Qsys_Snapshot.GIF


Please Note the following points:

  • The NIOS II reset vector points to the EPCQ controller, with some reset offset value.
  • The NIOS II exception vector points to the On-chip ram.
  • The maximum frequency allowed for the Altera serial flash controller is 25MHz. Hence, to use a higher frequency for NIOS II, a PLL would be used in the design, to maintain the data synchronization.

Software considerations

The user must consider the bsp settings according to AN 736.

NOTE: This Project works on NIOS II/f core only, since NIOS II/e core is not able to boot from EPCQ.

Attachments
0 Kudos
Version history
Last update:
‎06-27-2019 07:12 PM
Updated by:
Contributors

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.