- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
A newly generated license file doesn't allow a previously successful database build to produce an sof file. The license manager log file states the required feature was successfully checked out, and checked in, but quartus_asm doesn't agree with it.
The license manager, and the Quartus versions are both 23.3.
Running lmdiag on the feature also confirms that it is available on the same machine running quartus_asm.
The following is the output of quartus_asm and lmdiag:
[user@supermicro2 hardware_test_design]$ quartus_asm --read_settings_files=on --write_settings_files=off cxltyp3_memexp_ddr4_top -c cxltyp3_memexp_ddr4_top
Info: *******************************************************************
Info: Running Quartus Prime Assembler
Info: Version 23.3.0 Build 104 09/20/2023 SC Pro Edition
Info: Copyright (C) 2023 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the Intel FPGA Software License Subscription Agreements
Info: on the Quartus Prime software download page.
Info: Processing started: Mon Jul 8 17:32:32 2024
Info: System process ID: 1431063
Info: Command: quartus_asm --read_settings_files=on --write_settings_files=off cxltyp3_memexp_ddr4_top -c cxltyp3_memexp_ddr4_top
Info: The application is running in 'DNI' mode.
Info (16677): Loading final database.
Info (16734): Loading "final" snapshot for partition "root_partition".
Info (16734): Loading "final" snapshot for partition "auto_fab_0".
Info (16678): Successfully loaded final database: elapsed time is 00:00:26.
Info (22889): This design was generated using the DNI flow.
Error (23714): Can not generate programming files for your current project because you do not have a valid license. Visit the Intel FPGA Self-Service Licensing Center at https://licensing.intel.com
Warning (115005): Unlicensed IP: "CXL IP for Device Type3 with DDR4 based MemBuffer (6AF7 0188)"
Warning (115004): Unlicensed encrypted design file: "/proj/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/root_partition/23.3.0/final/1/netlist.model"
Warning (115004): Unlicensed encrypted design file: "/proj/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/auto_fab_0/23.3.0/final/1/names.model"
Warning (115004): Unlicensed encrypted design file: "/proj/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/auto_fab_0/23.3.0/final/1/netlist.model"
Warning (115004): Unlicensed encrypted design file: "/proj/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/root_partition/23.3.0/final/1/names.model"
Error: Quartus Prime Assembler was unsuccessful. 1 error, 5 warnings
Error: Peak virtual memory: 7791 megabytes
Error: Processing ended: Mon Jul 8 17:33:22 2024
Error: Elapsed time: 00:00:50
Error: System process ID: 1431063
[user@supermicro2 hardware_test_design]$ /tools/intel/intelFPGA_pro/23.3/quartus/linux64/lmutil lmdiag -c 1800@licmgr 6AF7_0188
lmutil - Copyright (c) 1989-2021 Flexera. All Rights Reserved.
FlexNet diagnostics on Mon 7/8/2024 17:33
-----------------------------------------------------
License file: 1800@licmgr
-----------------------------------------------------
"6AF7_0188" v2024.10, vendor: alterad, expiry: 06-oct-2024
vendor_string: iiiiiiiihdLkhMMMMMMMMUPDuiSSSSSSSS11X38oooooooopjz5cqqqqqqqqtmGzGEEEEEEEEbqIh0qqqqqqqqgYYWiHHHHHHHHbp0FVwwwwwwwwBUEakyyyyyyyyD2FFRllllllllWL$84
License server: licmgr
floating license expires: 06-oct-2024
This license can be checked out
-----------------------------------------------------
[user@supermicro2 hardware_test_design]$
Any suggestions on how to address the situation?
Thank you,
Ricardo
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi
Welcome to INTEL forum. Error show DDR4 based MemBuffer (6AF7 0188) license feature is not available. May we know what license you generate form SSLC, could you provide license.dat file for checking
For privacy, reply/attach file in private message.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi
I encountered the same problem and haven't been able to resolve it for a long time. Could you please help me to solve this issue?
Thank you!
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to https://supporttickets.intel.com/s/?language=en_US , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi
I encountered the same problem and haven't been able to resolve it for a long time. Could you please tell me how you solved this issue previously?
Thank you,
Warning(115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.
Warning(115005): Unlicensed IP: "CXL IP for Device Type3 with DDR4 based MemBuffer (6AF7 0188)"
Warning(115004): Unlicensed encrypted design file: "/home/jz/NeoProf_FPGA/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/auto_fab_0/22.3.0/final/1/netlist.model"
Warning(115004): Unlicensed encrypted design file: "/home/jz/NeoProf_FPGA/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/auto_fab_0/22.3.0/final/1/names.model"
Warning(115004): Unlicensed encrypted design file: "/home/jz/NeoProf_FPGA/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/root_partition/22.3.0/final/1/netlist.model"
Warning(115004): Unlicensed encrypted design file: "/home/jz/NeoProf_FPGA/hardware_test_design/qdb/_compiler/cxltyp3_memexp_ddr4_top/root_partition/22.3.0/final/1/names.model"

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page