Intel® FPGA Software Installation & Licensing
Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
1344 Discussions

JESD204B IP license

SMand29
Beginner
‎11-26-2019 11:08 PM
1,089 Views

We need a license for the JESD204B IP block to deploy embedded code for an academic research project (at Case Western Reserve University) using an Arria 10 SoC. How do we request a license?

0 Kudos

Link Copied

1 Reply
AR_A_Intel
Employee
‎11-27-2019 03:09 AM
904 Views

HI Sir

 

Altera University Program does provide free licenses to Professors/ Faculty Members of qualified Universities.

You can apply for license by going to https://software.intel.com/en-us/fpga-academic/teach. and fill up the License Request Form. If a student requires a license request for a specific IP, please have their professor submit a licenses request. Only professors can make these requests, but anyone can post questions on the forum.

Intel University Program team will review your request and respond to you at soonest possible.

Hello,

 

If you have any question regarding University Program, drop an Email to psg.university@intel.com   

Our university team will help and answer your question.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.