We have code that programs .jbc file to the FPGA using a controller.
Everything works fine when the .jbc is compiled with Quartus v16.1
But it fails when it's compiled with any newer Quartus versions.
Any ideas on how this can be fixed? It's not very efficient to have multiple Quartus versions and keeping track which project needs to be compile with which version.
May I know how do you generate the jbc file? Have you tested the sof file to be working? May I know if the you are facing jbc programming failure or flash to fpga configuration failure?
I am generating the .jbc file automatically when doing compile by going:
Assignments -> Device -> Device and Pin Options -> Programming Files -> Check the Jam STAPL Byte Code 2.0 File.
I am not able to try the .sof file, because with our design, the only way to program is to use .jbc file.
If you look at the 2 zip files that I attached, you can see the error message (v16 works and v20 doesn't work).
The results were the same. v16 .jbc file, which works, is smaller than the v20 .jbc file. I tried converting using the Programmer, and also showed the same file size difference.