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Valued Contributor III
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Aide d'un français / Help of french specialist

Bonjours à tous voila je cherche a mettre en œuvre L'USB DEVICE de la carte DE2 en utilisant le chipset philips "ISP 1362" sur la carte DE2 

 

Pour faire ceci : 

 

je crée un blockdiagramme/... sur quartus je lance SOPC Builder  

et je crée mon processeur comme si dessous ! 

 

 

http://nsa06.casimages.com/img/2009/04/16/090416034250666210.jpg (http://www.casimages.com

 

 

 

Je le génère sans problème et j'obtiens ceci : 

 

 

 

 

http://nsa06.casimages.com/img/2009/04/16/090416034543699414.jpg (http://www.casimages.com

 

 

 

 

Mon problème est de savoir quoi mettre sur toute ses pate des input des Output ??? 

De plus comment savoir si j'ai câblé correctement l'ensemble ? 

 

Le but étant d'envoyer des donner d'un pc au FPGA via l'usb qui se dernier renverra les donner sur les led par exemple. 

 

 

Merci de vos réponses. 

 

 

 

 

 

 

 

 

 

 

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Valued Contributor III
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Well I don't really speak french so maybe you can use google to translate this or something: 

 

1 - You are using the schematic method for creating your design. This is okay. Most people use HDL code (like Verilog or VHDL) to create a design. 

 

2 - What you need to do is connect the pins from your SOPC block to physical pins on your FPGA. You do this by adding pins to your schematic. You can right-click and insert a symbol. Or click on the "symbol" tool button on the left side of the schematic editor. Then browse down to the Altera libraries and under the "primitives" folder you will see a "pin" folder. This "pin" folder contains symbols for "bidir","input", and "output" pins. Add them to your schematic. Then you have to assign the pins to specific pins on your FPGA. 

 

I hope this gets you started. Sorry I don't speak french. 

 

Jake
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Valued Contributor III
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yes you have Understand but not The totality of the problem, i dont speak english very well sorry !! 

 

OKé!! 

 

Look this : 

page 19/20 

 

http://www.datasheetarchive.com/pdf-datasheets/datasheets-10/dsa-188102.pdf 

 

 

 

and now look my shématic The isp must be connect to the processor and i have "databus [15..0] bidirectional" where i connect this ? 

 

 

This is my probeme.I know the pins Outpout input :D !! 

 

 

 

 

http://nsa06.casimages.com/img/2009/04/16/090416054752589181.jpg (http://www.casimages.com

Very Sorry For my english men ! 

Thx to help me . 

 

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Valued Contributor III
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You simply need a bidirectional pin: Insert -> Symbol -> Libraries -> Primitives -> Pin -> Bidir.

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Valued Contributor III
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Are you trying to ask where to connect your ISP to a NIOS processor? 

 

Jake
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Valued Contributor III
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YES I try to connect ISP 1362 To nios

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Valued Contributor III
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hello I'm back I've new problem After Sopc builder and after "Compilation""Build" I dont have "xxx".Sof or "xxx".pof because i dont know ! 

 

http://www.casimages.com/img.php?i=09041702095959822.jpg 

 

HAVE you an idea ? 

 

http://www.casimages.com/img.php?i=090417021311143408.jpg (http://www.casimages.com/img.php?i=090417021311143408.jpg

 

Where is A .sof .pof i'm in the good Floder "project floder" 

 

 

I have not missing element ? 

I use the chips on the picture for the connection between "USB DEVICE(de2)" and "PC" ! 

 

 

http://www.casimages.com/img.php?i=090417022131100378.jpg
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Valued Contributor III
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Have you checked that your Quartus license is OK? 

 

From memory I think Quartus does not produce a programming file (SOF, POF etc) if your license has expired or is invalid
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Valued Contributor III
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True is good i use the trial version of quartus ! 

 

You think i use a good Element for make Connection USB Device with the DMA controler and the isp 1362 ? 

 

Is not false ? 

 

 

I'm a trainee in the big project ^^ huhu !!
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Valued Contributor III
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oké I've "the quartus II" licence i'm happy, but my works begin to come forward ! 

 

I stumble on my project thinks for the help !! 

 

 

Oh : goodnight beacause In french is 10H23 Am ^^ !!
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Valued Contributor III
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make -s all includes  

/cygdrive/c/altera/72/nios2eds/components/altera_hal/build/gtf_rules.mk:81: *** multiple target patterns. Stop. 

 

 

 

explain to me this error !!
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