Re: Compiler Error: Multiple reflexive accesses from channel xxx - Intel Community

Intel® FPGA University Program

University Program Material, Education Boards, and Laboratory Exercises

Compiler Error: Multiple reflexive accesses from channel xxx

1,604 Views

Link Copied

1 Reply

369 Views

Hi,

What version of OpenCL compiler/ BSP are you using ?

Are you using any of the example design provided by Intel ? Can you share your kernel code here to look further into it .

Thanks,

Arslan

Copy link

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.