Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
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DE2 Video Examples- Interlaced video handling?

Altera_Forum
Honored Contributor II
‎02-14-2011 06:35 PM
1,041 Views

Hello! 

 

I just started working on the examples in the University Program. When I take a look at "Example_4_Video_In", I can see the incoming images (720*244 or 720*243) being clipped at 640*240, before being scaled down to 320*240.  

 

Can someone explain how the interlaced video stream is being handled? Are the even or the odd frames just dropped? Or are both field handled as normal "progressive" images? 

 

Because I can`t see any deinterlacing taking place... 

 

Thnx!
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