Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
1175 Discussions

DMA's Front and Back Buffer Address Translator

Altera_Forum
Honored Contributor II
‎09-02-2016 06:44 AM
979 Views

Hi Friends, 

 

I want to use the "DMA's Front and Back Buffer Address Translator " IP core, but i can't find the description of the register map of it. 

Does anyone have imformation about this? Any help would be greatly appreciated. 

 

Best Regards.
0 Kudos

Link Copied

0 Replies
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.