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Hello , I encountered some problems while learning to use PLL Reconfiguration.
I use Development board is DE0-CV (cyclone v) and Quartus ii version is 18.0.
I used the IP catalog to create a 10 MHZ PLL and then a 30 MHZ PLL .mif file.
Then I created a PLL reconfiguration and streaming 30MHZ PLL .mif.
I wrote the .mif Base Address (6'b011111) according to the operation manual, but it seems that PLL reconfiguration does not read the .mif reader.
Would you like to ask if there are any steps missing, or there is an error in my operation.
Thank you.
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Here is a demo video for PLL reconfiguration using .mif file.
https://www.youtube.com/watch?v=LZHDkNgHZ1I
Important to write at the correct address locations for the change to take effect.
Regards
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Thank you for taking the time to answer my question.
I have found the problem after trying, I can already change the frequency of the PLL, thank you very much for your help.
But I want to ask another question, because I need to use a lot of frequency so I have to switch frequently. What I want to ask is how should I merge MIF files
Thank you.
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Hi,
I don't think .mif can be merged.
This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you

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