07-21-2010 07:23 AM
HiI'm trying to realize a simple audio processing sistem using DE1, Nios, University Program Audio Core and Audio config. The CODEC seems to be properly configured via I2C since I'm able to modify some parameters (like line in - line out bypass) The processor seems to work fine I'm able to read data from switches, write on leds and print a string on STDIO. However when I'm triyng to read the data from audio codec (reading the registers), the fifo is always empty "0x80800000" and the dara are always "zero". From a hardware point of view (using Signal Tap II Logic Analizer) i can see that the signals from the codec are correct while all the signals to the codec (like AUD_BCLK, AUD_DACLRCK, AUD_DACDAT are absent) but may be it could also be correct if the Nios does not generate the proper data) Any suggestion? Are any example available? A further question: In the "Audio Configuration Core" one parameter is the Sampling rate which can assume values between 0 and 15 (what is it for?) who the sampling rate is related to this number ? The documentation provided with this block lacks in this detail. thank you
07-21-2010 11:32 AM
Probably I've resolved the problem:Since it in SOPC builder it is not possible to set the Audio Codec to work as Master or Slave, the AUD_BCLK, AUD_DACLRCK and AUD_ADCLRCK signal must be configured as "bidir" an not as "output"
01-31-2013 07:04 AM
Hi can you send me your project file in which you have interfaced the Altera DE1 Audio Codec.This will be helpful to complete my Grad Project. Thanks a lot