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Altera_Forum
Honored Contributor I
1,279 Views

Problem with Pixel_Buffer_DMA and SDRAM

Hello guys. 

 

I have an Altera DE2-115 dev. board and I'm trying to use NIOS to display some images on a monitor, using the VGA connector on the board. I'm using quartus 11.1 and I'm following instructions on the pdf of altera university program. 

 

I used nios II, on-chip memory (RAM OR ROM), clock signals, sram/ssram controller, pixel buffer dma controller, rgb resampler, scaler, dual clock buffer and vga controller to do it, and it works ok, I can send images to the monitor. 

 

But, when I try to use SDRAM as reset vector and exception vector of the nios II CPU, then it doesn't work anymore. The alt_up_pixel_buffer_dma_dev pointer that I get from the alt_up_pixel_buffer_dma_open_dev function is not null, but all other functions seem to do nothing, like alt_up_pixel_buffer_dma_clear_screen, alt_up_pixel_buffer_dma_draw_rectangle, alt_up_pixel_buffer_dma_draw_box, etc. Is there some problem in using this module with the SDRAM? 

 

Thanks! 

 

Edit: I'm using SOPC Builder to design the hardware.
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5 Replies
Altera_Forum
Honored Contributor I
31 Views

Have you tried setting the reset/exception vector to on-chip memory? I had this issue also trying to implement a frame buffer for the project I'm working on now. (BTW if you get the back buffer to work using the pixel_buffer_dma driver please let me know, I've been having trouble with it). I found reading/writing for the SDRAM worked when I had on-chip memory for reset/exception but when I changed it to SDRAM, it no longer worked. Let me know if this helps.

Altera_Forum
Honored Contributor I
31 Views

Yes, with on-chip memory it works, but as my system does some data processing and the on-chip memory total size is not enough, I have to use the SDRAM so my system can have all memory it needs to do the processing. Thanks, anyway.

Altera_Forum
Honored Contributor I
31 Views

That's fine, you can use all that memory for data processing as long as the on chip is used for reset and exception. If you ever find out why/how to do this with the sdram, let me know. I've seen tutorials on it but it flat out just doesn't work unless its the on chip.

Altera_Forum
Honored Contributor I
31 Views

The reset vector is where the first instruction is read from. 

If it references SDRAM something would have to initialise the SDRAM before the processor can execute the code from it. 

(This is almost certainly possible if you hold the cpu in soft-reset while something else writes the code into SDRAM.) 

Most of the boot sequences actually use the nios cpu (running from some internal memory) to write the code and data into the required memory areas.
Altera_Forum
Honored Contributor I
31 Views

Hello every one sorry for my english , I'm new here and just want to reply for this thread :  

The problem is not with SDRAM it's the address of the pixel buffer change it to much the adress of your memory in the system.  

The Default buffer start address: 0x0....... 

The Default back buffer start address :0x0..... 

Hope this will be helpfull
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