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Quartus 9.1sp2 + University SD card core

Altera_Forum
Honored Contributor II
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Hi, 

 

I've been trying to build a rather basic computer for a DE1 board. 

 

This computer is basically the exact same as a DE1 basic computer but I need to add an MMU and support for the SD card. 

 

I was able to build the computer successfully and download it onto the board without support for the SD card. 

 

When I try to add the SD card componant to the SOPC building and compile, it gives me the following two errors: 

 

Error: SDcard: More than one port in SDcard:clock_sink has role reset Error: SDcard: More than one port in SDcard:clock_sink has role reset 

 

I believe this is because the cores were built for Quartus 9.0. (the cores are the ones that you can download with the installer with the University program package from Altera) 

 

Does any one have any idea how to fix the tlc script for the SD card IP core? 

 

Here is the code that I believe is generating the error (this is in the hw.tcl file for the core) 

 

set_interface_property avalon_slave_0 ASSOCIATED_CLOCK clock_sink ... # | # +----------------------------------- # +----------------------------------- # | connection point clock_sink # | add_interface clock_sink clock end set_interface_property clock_sink ptfSchematicName "" add_interface_port clock_sink i_reset reset Input 1 add_interface_port clock_sink i_clock clk Input 1 add_interface_port clock_sink i_reset_n reset_n Input 1 

 

Thank you in advance for your help.
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Altera_Forum
Honored Contributor II
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Hi, I have exactly the same problem after migrating from Q 8.1 to 9.2sp2. I'm trying to find a solution but I didn't solve the problem yet. I'll let u know if I find sth. 

 

Regards
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Altera_Forum
Honored Contributor II
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Are you using NIOS II 9.1at all in your project? If so, apparently projects prior to 9.1 need to be converted to 9.1 format. Here is a link to a document that discusses this. 

 

http://www.altera.co.jp/literature/hb/nios2/n2sw_nii52019.pdf 

 

Hope that helps. 

 

-Jorden
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Altera_Forum
Honored Contributor II
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Yes , I'm using NIOSII 9.1sp2 as well as Quartus 9.1sp2. The document you provided presents the way of converting the nios2 project to the new version with BSP (software build tools). Unfortunately, it doesn't help in the SOPC Builder where the error 'More than one port ...has role reset' appears.  

 

The thing is , I don't even need nios2 project to get the described error. The problem lies in the SOPC component description which is somehow faulty. 

 

Thx for the info, though ! 

Regards
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Altera_Forum
Honored Contributor II
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OK, I solved the problem. I generated the faulty component with version 9.1sp2 and tried to generate the project again in SOPC Builder - it DIDN'T work. Obviously , the SOPC Builder has a bug which doesn't allow to use two reset inputs in clock_sink component, where one is aclr (DSP Builder clock default) and second is a simple reset input.  

 

Therefore I modified the appropriate vhdl interface in order to use only one reset input. This allows to generate SOPC Builder project. It doesn't solve the bug but allows me to move forward. 

 

Regards
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Altera_Forum
Honored Contributor II
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Hi Joel, 

 

I tried installing the core with 9.0sp2 (on my friend's computer) and it seemed to allow it. So it is obviously a bug that only appears in later versions. 

 

Do you mind posting the "fix" to the core so that everyone could benefit? 

 

Regards,
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Altera_Forum
Honored Contributor II
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Allowing only one reset per module is standard operating procedure. It was a bug to ever allow this in the first place. 

 

-slacker
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Altera_Forum
Honored Contributor II
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I would also much appreciate those fixes :D  

Been banging my head against the keyboard for some time now trying to get this to work
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Altera_Forum
Honored Contributor II
311 Views

Hi, 

sorry for being maybe not to clear but I got to work my own module, which I have had sources in DSP Builder for. It was successful build in DSPBuilder 8.1 and stopped working in 9.1sp2. I can not repair any other, pre-build blocks, sorry.  

 

I have had two resets, one asynchronous and other one synchronous. I had to get rid one of them to make my component working again.  

 

Best regards, 

Joel
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Altera_Forum
Honored Contributor II
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To get rid of those Error messages while generating the NiosII processor, open the file Altera_UP_SD_Card_Avalon_Interface_hw.tcl and comment (add a# to the beginning of) the line 112, which states (after commenting): 

# add_interface_port clock_sink i_reset_n reset_n Input 1 

 

Then refresh and regenerate. 

 

I do not know the effect of doing so on the SD Card Interface operation yet, as I am expermenting a lot here :) 

 

--Bruno
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