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Hello,
I have a ADC interface logic that receive data regularly over 3.2MHz SPI link.
I want to send these data to SDRAM which is interfaced with Nios II system. Ultimately I would like to implement a 'snapshot mode' as mentioned in https://community.intel.com/t5/Programmable-Devices/Oscilloscope-High-speed-Application/m-p/148034
what is most efficient way to go about sending these ADC data to SDRAM?
I am thinking PIO for this.
Also what do I need to do on Nios II application to store data in SDRAM?
Thank you for your time.
- Tags:
- FPGA
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You can download the .par from below link on how to add and access sdram:
https://fpgacloud.intel.com/devstore/platform/16.1.0/Standard/sdram-nios-test-max10-de10-lite/
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