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Altera_Forum
Honored Contributor I
1,895 Views

UP VGA Pixel Buffer problem

Hello, 

 

I'm trying to use vga pixel buffer as a data source for the vga controller in SOPC builder on a DE2 board using Quartus 9.1. 

 

I'm not really sure what I need to use with the pixel buffer. After some reading on the altera vga note, I found that it needs the SRAM to store pixel data. I think the problem is the SRAM, I managed to output pixels to my monitor but its only garbage. Could someone enlight me on how to connect SRAM and pixel buffer in SOPC builder? 

 

Note: VGA controller, pixel buffer and SRAM components come from the University Program IP Core. 

 

I put a screen shot of my SOPC build in attachment.
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26 Replies
Altera_Forum
Honored Contributor I
18 Views

I finally solved my problem! 

 

Components connections are shown in my attachment. 

I set the pixel_buffer "Default Buffer Start Address" to the base address of the SRAM (0x00900000). Plus, I added the Alpha_blender so I can display both source at the same time on my monitor. char_buffer is displayed as foreground and pixel_buffer as background. 

 

pixel_buffer is configure to work in 320x240 (width factor: 2, height factor: 2) and color space is 16-bit RGB.
Altera_Forum
Honored Contributor I
18 Views

Have You changed anything in VGA Controller and Pixel Buffer design files? I am trying to make them working but I have only black screen...

Altera_Forum
Honored Contributor I
18 Views

Hello ronix5000, 

 

Have you look at my screenshot of my system build? 

Make sure vga_ctrl clock is set to 50MHz (other components connected to it will need to be at 50MHz too). 

Pixelbuffer needs SRAM to work. Pixels will actually be stored in this SRAM. Last thing, pixelbuffer needs its start address (in the properties) to be set to base address of SRAM. 

 

I have not made any changes to design files. 

 

If you want to test if vga controller is working, you can try to connect only the character buffer (without alpha_blending and SRAM). 

 

Hope this will help. 

 

Regards
Altera_Forum
Honored Contributor I
18 Views

I have DE2-70 board and I have been trying to generate 640*480 pixel vga signal but I have a message like "could not open pixel buffer device". 

if there is anyone who design it using "video out university ıp core" and make it work,could you share sources codes (.SOPC,.V,.C,.SOF,.ELF .....).
Altera_Forum
Honored Contributor I
18 Views

What string are you passing to alt_up_pixel_buffer_open_dev() function and what is its device name located in system.h ?

Altera_Forum
Honored Contributor I
18 Views

Hello renaudberube! 

 

Thx for your reply! I found out what was wrong - I made some terrible mistake while adding sdram to my project (used output instead of bidirectional pin). Now everything is working like a charm :) Anyway many thx for your concern :) 

 

Regards 

 

@speak48 

Probably you pixel buffer device has different name in your sopc system, maybe "pixel_buffer_0" or something like that... 

 

Many people have problems with this VGA stuff, so I attached some basic project including pixel buffer and simple software that draws some garbage on the screen. Hope some of You will find that useful. Project is for DE-2 board
Altera_Forum
Honored Contributor I
18 Views

Thanks a lot ronix5000 :) 

I found my mistake finally.I generated 640*480 vga signal but first it took about 1000-2000ms to change all screen (100 Mhz nios core) and then I have made some modifications which reduce it to 117 ms (max. 9 fps).it is still not enough.I mean it looks like impossible to play a real-time video. Can this problem be handled somehow or should I change the video out core ?
Altera_Forum
Honored Contributor I
18 Views

are you using double buffering? maybe it will help...

Altera_Forum
Honored Contributor I
18 Views

I don't know.what is double buffering? I have just connected 50 Mhz "up_ip_core"(s) and the "clock crossing bridge" with 100 Mhz nios system.

Altera_Forum
Honored Contributor I
18 Views

ok but pixel buffer has ability of double buffering - it draws first buffer from memory while changing the second, then it draws second changing the first etc. You should analyze the code of pixel buffer to better understand this, cause in my opinion the only thing that determines fps is how fast you can rewrite SDRAM (or SRAM whatever).

Altera_Forum
Honored Contributor I
18 Views

i'm very grateful for the VGA example posted earlier. 

i use DE2 board as well and i'm attempting to connect at TRDB_LTM board using the VGA example, as according to the IPs used this module is supported. 

i made the necessary changes to the SOPC but i get a disorted image, as if i the LCD cannot synchronize with the signal. 

I use the configuration from the TRDB_LTM (Ephoto) project. 

 

any ideas?
Altera_Forum
Honored Contributor I
18 Views

OK, i got the issues fixed. apparently i was giving an incorrect clock to the LTM. now everything works.

Altera_Forum
Honored Contributor I
18 Views

@renaudberube 

 

hi 

where did u get the Uiversity IP core version 9.0? in altera's website, i only found for version 8.0 

actually, i'm currently designing a JPEG decoder using SOPC builder from Quartus 9.0sp1 and i'm having difficulties in this VGA core, then i saw your thread and your design using pixel buffer. but as i said, the pixel buffer i have is the version 8.0. oh, and i'm planning to use the sdram as the buffer
Altera_Forum
Honored Contributor I
18 Views

For some reason, the Altera website only shows the 8.0 cores. 

But changing 80 to 90 in the URL brought me to the 9.0 cores. 

 

ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/
Altera_Forum
Honored Contributor I
18 Views

@geffen: 

i couldnt find the University Program IP in the url you gave me... but thanks anyway for your help. i've tried to use the pixel buffer for VGA core and even streaming adapter to change the number of bit per simbo from 10 bit per simbol to 8 bit per simbol. because in the VGA core, the output device is TRDB_LCM while the pixel buffer doesnt have that TRDB_LCM, only VGA connector and TRDB_LTM. but still i'm getting errors, like "the empty signal width of the source is 1, and the sink is 2". i dont know how to fix this...
Altera_Forum
Honored Contributor I
18 Views

Here is the link to the Video interface 

ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/video_out.zip 

you also need external clocks component (at least i used them) 

ftp://ftp.altera.com/up/pub/university_program_ip_cores/90/altera_up_avalon_external_clocks.zip 

extract it somewhere known 

go to SOPC Builder 

select tools->options 

go to ip search path category 

and Add the folder where you extracted Video_Out and video clocks
Altera_Forum
Honored Contributor I
18 Views

@geffen11: 

 

thank you so much for the help. i got my problem solved ^_^
Altera_Forum
Honored Contributor I
18 Views

does anyone have the datasheet for VGA core version 9.0??

Altera_Forum
Honored Contributor I
18 Views

Altera_Forum
Honored Contributor I
8 Views

@geffen 

 

thanks geffen
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