What is the problem of my simulation of "WAVEFORM VECTOR FILE"?

[HSlam]

After I draw an electronic circuit, I tray to do a simulation with "WAVEFORM VECTOR FILE" but when I execute my simulation I have this erreur : (

Error (199014): Vector source file E:/intelFPGA_lite/18.1/PROJET COS X/Waveform.vwf specified with --testbench_vector_input_file option does not exist

Error: Quartus Prime EDA Netlist Writer was unsuccessful. 1 error, 1 warning

Error: Peak virtual memory: 488 megabytes

Error: Processing ended: Mon Mar 25 15:14:02 2019

Error: Elapsed time: 00:00:00

Error: Total CPU time (on all processors): 00:00:01

Error. )

Can you help me please.

[Vicky1]

Hi Hammia,

Please follow the below steps,

1. "Simulation" Menu-> "Simulation Settings"
2. Perform "Restore Defaults "
3. Then"Save"

Refer the below screenshot & let me know if this has resolved your issue,

Regards,

Vikas

[HSlam]

I follow the bellox steps

1.      "Simulation" Menu-> "Simulation Settings"

2.      Perform "Restore Defaults "

3.      Then"Save"

this time the execution has progressed but it displays the following message:

===========================================================

# ** Error: Waveform3.vwf.vht(36): near "0": (vcom-1576) expecting IDENTIFIER.

# ** Error: Waveform3.vwf.vht(72): Integer literal 0 is not of type ieee.std_logic_1164.STD_LOGIC.

# ** Error: Waveform3.vwf.vht(87): VHDL Compiler exiting

# End time: 12:03:30 on Mar 27,2019, Elapsed time: 0:00:00

# Errors: 3, Warnings: 0

# ** Error: e:/intelfpga_lite/18.1/modelsim_ase/win32aloem/vcom failed.

# Executing ONERROR command at macro ./COSX.do line 4

Error.

===========================================================

Look please at the below screenshot :

[Vicky1]

Hi Hammia,

"this time the execution has progressed but it displays the following message"

That`s nice, now error is at line 32 of Waveform3.vwf.vt, open that file & try to debug the issue.

If you provide your project(Project->Archive Project) that will be easier to others to support.

Regards,

Vikas