i'm using Quartus Prime Lite Edition 18.1, MS Visual Studio 2010 pro, Windows 10 OS. My problem is "I could create test-x86-64.exe / test-fpga.exe and those are passed successfully.
But the compilation is always unsuccessful ( .QPF file where created in ...-fpga.prj folder) on Quartus Prime Lite 18.1. The reasons are different which are depend on the example type." I could not find the same question/answer on the internet and in the intel forum. where is my fault?
- Regarding device family. Supported device families are:Cyclone 10 GX, Stratix 10, Arria 10, MAX 10, Cyclone V, Arria V, Stratix V.
- To which device PN you have generated the HLS IP/Design? default is Arria10 if we use build.bat file.
Refer session 8.1 from below link for Adding the HLS Compiler-Generated IP into an Intel Quartus Prime Project.
I have used Quartus lite 18.1 & MS Visual Studio 2010 on windows 10 environment.
example design of counter with Cyclone V device and followed session 8.1 from above link.
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Thank you for your helpful answer.
in my situation, refer session 7 was more useful than 8.1 from https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/ug-hls.pdf.
You were right. My test-fpga.exe (test-fpga.prj) was created on Arria10. but I was trying to compile it on Cyclone IVE device family on QPLite. After your answer, i tried on CycloneV device and it compiled successfully. Thank you again.