Intel® High Level Design
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
505 Discussions

Cyclone V FPGA"s Table of anti-ionizing radiation capability parameters,about SEUs

User1582874055961483
272 Views

客户在医疗器件加速器上使用Cyclone V FPGA"s 在验证的过程中, 想要得到一些 官网具体参数的依据,关于单粒子翻转

0 Kudos
3 Replies
NurAiman_M_Intel
Employee
199 Views

Hi,

 

Thank you for contacting Intel community.

 

Per my understanding, are you looking for SEU FIT report? Please correct me if i'm wrong.

 

 

For SEU FIT rate report, you can generate the report by using Quartus Prime with your Quartus design.

 

You may refer to youtube link below as it contain the complete step to generate SEU FIT report.

https://www.youtube.com/watch?v=eqcmuwGpGAI

 

Do inform me if this is not what you are looking for.

 

Thank you.

 

Regards,

Aiman

User1582874055961483
199 Views

我的客户需求为 Cyclone V器件在高速和核磁辐射的影响下,芯片内部发生错误的比率 。例如 在多大的辐射影响下 芯片内部传输数据发生多少百分比的错误,类似于这样子的一个Sheet.

NurAiman_M_Intel
Employee
199 Views

Hi,

 

Apologize that my previous response did not address your question. Per my understanding, you are referring to Single Event Upset(SEU)? If yes, kindly refer to the link for SEU below:

https://www.intel.com/content/www/us/en/programmable/support/quality-and-reliability/seu.html

 

Thank you.

 

Regards,

Aiman

Reply