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Double Precision IEEE 754 Division on FPGA

NickM
Beginner
‎07-10-2020 10:18 AM
752 Views

Hello,

I was trying to find out if it is possible to force hardware to produce a IEEE 754 compliant division unit for double precision floats. Currently the design defaults to "faithful rounding".

NickM_1-1594401453958.png

 

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GouthamK_Intel
Moderator
‎07-13-2020 03:29 AM
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Hi,


As your issue is related to FPGA, we are moving your case to FPGA forum for quicker response.


Thanks

Goutham


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