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FPGA implementation of file I/O circuits using HLScompiler

gazel
Beginner
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I would like to implement a file input/output circuit (file_in_out.cpp) written in C++ on a DE10-standard (5CSXFC6D6F31C6) using intelHLScompiler.
I was able to implement it on FPGA with quartusprime17.1 using high-level synthesis, but it does not work correctly. I tried to turn on the LED at the end of the circuit to check if the circuit is working, but it did not turn on. Personally, I think the placement and wiring of qsys is not good, can you tell me what is wrong? Please help me.

gazel_1-1624868320260.png

 

gazel_0-1624868282410.png

 

 

 

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BoonBengT_Intel
Moderator
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Hi @gazel,

 

Greetings, as we do not receive any further clarification on what is provided. Hence would assume problem are resolved and we will no longer monitor this thread. For new queries or problem persist, please feel free to reopen existing thread or open a new thread and we will be right with you. Pleasure having you here.

 

Best Wishes
BB

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BoonBengT_Intel
Moderator
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Hi @gazel,

 

Thank you for posting in Intel community forum, hope all is well and apologies for the delayed in response.
Following up on the queries, please do let us know if the doubts are still here, and we would try our best to clarify.

 

Best Wishes
BB

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BoonBengT_Intel
Moderator
548 Views

Hi @gazel,

 

Greetings, as we do not receive any further clarification on what is provided. Hence would assume problem are resolved and we will no longer monitor this thread. For new queries or problem persist, please feel free to reopen existing thread or open a new thread and we will be right with you. Pleasure having you here.

 

Best Wishes
BB

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