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Unable to compile the vector add usm program for any FPGA hardware

Avinash1
ビギナー
3,995件の閲覧回数

Hi ,

I was facing a few problems trying to compile and run my code on FPGA. I was unable to run the pre-compiled binary on FPGA as well. So I thought to try compiling the sample vector add usm for both arria and stratix, as I was unsure which one supported USM. I've attached images to show what I've tried and the resulting error.

Thank You 

 

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8 返答(返信)
Christoph9
新規コントリビューター II
3,981件の閲覧回数

Hey,

 

sadly you did just include an screenshot of the .e file, but in the .o file should be the exact error message. If the error is caused by the board-package, take a look at this post:

 

https://community.intel.com/t5/Intel-DevCloud/Unable-to-get-output-from-oneAPI-Base-Toolkit-s-vector-add/m-p/1422224/highlight/true#M6328

Avinash1
ビギナー
3,971件の閲覧回数

Thank you for the reply.

I looked into the link provided and added the BSP flag for stratix usm. I was able to compile the sample but I am not able to run it on an FPGA. Below are the steps I followed while trying to compile and run the code. Could you let me know where I went wrong.

 

1) created a compile_and_run.sh file with the following content

#!/bin/bash
source /opt/intel/inteloneapi/setvars.sh --force

cd oneAPI-samples/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/src

echo STARTING COMPILATION
dpcpp -fintelfpga -Xshardware -Xsboard=/opt/intel/oneapi/intel_s10sx_pac:pac_s10_usm vector-add-usm.cpp -o vector_usm.fpga
echo COMPILATION DONE

echo STARTING TO RUN ON FPGA HARDWARE
./vector_usm.fpga
echo RUN COMPLETE

 

2) submitted the job to a node containing fpga_compile property (qsub -l node=1:fpga_compile:ppn=2 -d . compile_and_run.sh)

3) The resulting output and error files were generated (screenshots attached)

4) While I tried to run the stratix code on a node having 'fpga_compile' I could not run it. So I opened an Interactive session with a node having 'fpga-runtime' and 'stratix10' as properties and ran the code (./..../vector_usm.fpga). The following was the result :

Running on device: Intel(R) FPGA Emulation Device
Vector size: 10000
An exception is caught while adding two vectors.
terminate called after throwing an instance of 'cl::sycl::runtime_error'
what(): Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
Aborted

 

For some reason it is not able to select the FPGA hardware. Is there a particular node having usm supported FPGA ?

 

Christoph9
新規コントリビューター II
3,959件の閲覧回数

Hey,

 

first of: You ca not run the fpga-executables on the fpga_compile-nodes. It is therefore necessary to use the runtime-nodes (As you did in the later steps).

 

On the stratix-node, you will probably need to initialize the board using the usm-bsp:

aocl initialize acl0 pac_s10_usm

Before this, sycl-ls could returns something like this:

uxxxxx@s001-n142:~/$ sycl-ls
[opencl:cpu:0] Intel(R) OpenCL, Intel(R) Xeon(R) Platinum 8256 CPU @ 3.80GHz 3.0 [2022.14.7.0.30_160000]
[opencl:acc:1] Intel(R) FPGA SDK for OpenCL(TM), pac_s10 : Intel PAC Platform (pac_ee00000) 1.0 [2022.3]
[host:host:0] SYCL host platform, SYCL host device 1.2 [1.2]

After initializing it should return the following:

uxxxxx@s001-n142:~/$ sycl-ls
[opencl:cpu:0] Intel(R) OpenCL, Intel(R) Xeon(R) Platinum 8256 CPU @ 3.80GHz 3.0 [2022.14.7.0.30_160000]
[opencl:acc:1] Intel(R) FPGA SDK for OpenCL(TM), pac_s10_usm : Intel PAC Platform (pac_ee00000) 1.0 [2022.3]
[host:host:0] SYCL host platform, SYCL host device 1.2 [1.2]

Hope this helps,
Christoph

Avinash1
ビギナー
3,940件の閲覧回数

Hi Christoph,

I followed your instructions and was able to initialize stratix-usm but still unable to run it. It gives the same error as mentioned before.

Could you let me know if there are any flags that I might be missing during compilation ?

This is the current command I use :

dpcpp -fintelfpga -Xshardware -Xsboard=/opt/intel/oneapi/intel_s10sx_pac:pac_s10_usm vector-add-usm.cpp -o vector_usm.fpga

I've kept the code for compilation again but I've changed the code to select an FPGA hardware or nothing unlike before where it selected an FPGA EMULATOR. I'd have to see if it works.

Could you try compiling and executing the vector add sample code if possible ?

 

Thank You,

Avinash

 

hareesh
従業員
3,824件の閲覧回数

Hi,

i am working on it. pls give me some time. i'll get back to you.


hareesh
従業員
3,734件の閲覧回数

Hi,

https://www.intel.com/content/www/us/en/developer/articles/code-sample/vector-add.html?wapkw=compiling%20the%20sample%20vector%20add%20usm


i think above article will helps you. please go through it. i am also trying from my side to duplicate the issue.


Thanks,


hareesh
従業員
3,699件の閲覧回数

Hi,

any update?

still do you facing that problem?


hareesh
従業員
3,686件の閲覧回数

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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