I'm implementing a system using HLS that has a number of on-chip memories (currently 12, but it could increase) that need to be initialized from the host, with different data widths and address widths. I'm defining those memories as Avalon-MM slaves in their respective components, and then in a separate component have an Avalon streaming interface that is supposed to receive data from the host and populate the memories using a number of Avalon-MM master interfaces.
My question is, when I compile the HLS code and view the result in Platform Designer, the Avalon-MM master arguments are translated into two arguments, one with Avalon-MM master type which is named avmm_<number>_rw, and another one which is a conduit with the name of the argument as specified in the C++ code. What is this conduit argument and what am I supposed to connect it to?
Thanks in advance for your help.
Avalon Conduit Interface is an interface type that accommodates individual signals or groups of signals that do not fit into any of the other Avalon types. You can
connect conduit interfaces inside a Platform Designer system. Alternatively, you can export them to connect to other modules in the design or to FPGA pins.
Thank you for your response. But my question was about the conduit generated for the Avalon-MM master interface for an HLS component in particular, not conduits in general. If my understanding is correct, Avalon-MM master interface is supposed to control an Avalon-MM slave, but in this case (i.e., defining an Avalon-MM master interface as an input argument for an HLS component), there's also a conduit with the same name as the master in the IP generated for the component. I wanted to know what is the functionality of this particular conduit.