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527 Discussions

Use HLS to access a slave Avalon MM IP

TMich2
New Contributor I
1,245 Views

Is there example on how to use HLS to access PIO SPI 16650 Avalon IP blocks? Or what is the best way to get started? I looked at the examples in the HLS directory, but don't understand how to connect the output of platform designer to HLS.

 

For example:

  • create a design in platform designer with avalon mm master with several IP devices
    • 16650 serial port
    • PIO
  • how does HLS create mappings to the Avalon mm master?

 

 

0 Kudos
3 Replies
MuhammadAr_U_Intel
434 Views
Hi, HLS tool will help you to convert your C code to HDL code, output from HLS provides you a Quartus project and an IP component as well that can be used in Platform designer to integrate with rest of the system. Now in your case you need to connect avalon MM slave component, so you will need a avalon mm master from HLS. I would suggest start from a simpler example like "counter' to familiarize your self with the output files generated by HLS, followed by using interface examples for HLS located in installation directory. "C:\intelFPGA\18.1\hls\examples\tutorials\interfaces" Thanks, Arslan
TMich2
New Contributor I
434 Views

OK, I'm using the Cyclone 10 LP, does i++ support this device?

For example:

c:\intelFPGA_lite\18.1\hls\examples\counter>build-cyclone10.bat test-fpga

i++ -march=Cyclone10LP counter.cpp -o test-fpga.exe

Error: Device information not found.

Device not a legal family or part code (Cyclone10LP)

 

Run test-fpga.exe to execute the test.

MuhammadAr_U_Intel
434 Views
Unfortunately HLS is not supported for Cyclone10 LP. Refer to the list of supported devices. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/hls/mnl-hls-reference.pd... Page 6, Table2, option “-march=[x86-64 |<FPGA_family> |<FPGA_part_number>” Thanks, Regards, Arslan
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