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When I use the IP core of HPS and the IP core of DDR4 to build a project, I want to use the signal tap to see whether DDR4 is initialized successfully. However, when I download the generated sof file to the FPGA board on the signal tap interface, the system reports an error: the sof file is incomplete - HPS is present but the boot loader is missing
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hi, i understand that you are having problem when downloading SOF in signal tab. What about quartus programmer? is there any issue on it?
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