Intel® ISA Extensions
Use hardware-based isolation and memory encryption to provide more code protection in your solutions.

AMX support in SDE incomplete?

Beulich__Jan
新貢獻者 I
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Looking at CPUID output with -spr I notice

- leaf 7 subleaf 0 EDX bits 24 and 25 set, but bit 22 clear (i.e. no AMX-BF16)

- leaf D subleaf 0 ECX being 0xA80 (i.e. covering just the low 8 XCR0 bits)

- leaf D subleaf 17 and 18 entirely empty

Is this intentional?

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1 解決方案
AdyT_Intel
主席
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Yes, you are correct. We did miss updating the value for the max leaf reported (i.e. leaf 0 - EAX).

You can fix it yourself by editing the CPUID definition file for SPR (this is a text file in the kit).

The file is under the: misc/cpuid/spr/cpuid.def directory in the kit. The file format is quite simple. Just edit the entry for leaf 0 and put 1e instead of the current value of 14. 

Thanks for reporting this. We will fix it for next release.

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Beulich__Jan
新貢獻者 I
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And to add to the apparent mess

- leaf 0 EAX = 1A (i.e. no leaves 1D and 1E)

Otoh leaf 7 subleaf 0 EAX has bits 17 and 18 set.

Beulich__Jan
新貢獻者 I
3,247 檢視

I'm sorry - I was wrong with "leaf 7 subleaf 0 EDX bits 24 and 25 set, but bit 22 clear (i.e. no AMX-BF16)"; apparently I couldn't count. All other aspects look to apply, though.

AdyT_Intel
主席
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This is not intention, I'll review the CPUID definition for all the AMX features.

AdyT_Intel
主席
3,211 檢視

I checked the CPUID definition for Sapphire Rapids CPU and I found that the bits are correct.

This means:
- Leaf 7 sub-leaf 0  => EDX is 0x03554110 (bits 22,24,25 are set).
- Leaf 0xd sub -leaf 0 => EAX is 0x600ff (bits 17/18 are set)

However, the current version of Intel SDE (8.56) does not support XSAVE/XRSTOR  for the AMX data and does not emulate the XFD feature. 

Please note that this CPUID definition is available under the -spr CPU knob.

 

Beulich__Jan
新貢獻者 I
3,209 檢視

I did check with -spr, yes. Bits 17 and 18 set in D:0:EAX implies subleaves 17 and 18 also supplying non-zero output, aiui.

What's more important for my immediate purpose though are leaves 1D and 1E, which are missing altogether (due to the highest leave reported being 14 iirc). Without these I can't determine tile valid configuration(s).

AdyT_Intel
主席
3,206 檢視

Yes, you are correct. We did miss updating the value for the max leaf reported (i.e. leaf 0 - EAX).

You can fix it yourself by editing the CPUID definition file for SPR (this is a text file in the kit).

The file is under the: misc/cpuid/spr/cpuid.def directory in the kit. The file format is quite simple. Just edit the entry for leaf 0 and put 1e instead of the current value of 14. 

Thanks for reporting this. We will fix it for next release.

Beulich__Jan
新貢獻者 I
3,187 檢視

Ah, interesting, thanks. This then also allowed me to fix leaf The file specifies subleaves hex 17 and 18, when it should be hex 11 and 12 (dec 17 and 18).

There are also similar max leaf issues in other files - I've changed skl, snr, and tnt here, but I think I saw a few more where I simply thought I didn't care for now.

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